1. Field of the Invention
The present invention relates to multitasking, and more particularly, to multitasking on a reconfigurable array.
2. Description of the Related Art
A reconfigurable architecture means a circuit product whose function can be changed by a user's intention. A Field Programmable Gate Array (FPGA) is an example of a reconfigurable array. FIG. 1 is a view for explaining a reconfigurable architecture. In detail, FIG. 1 illustrates a FPGA which was manufactured so that “Y=A*X**X+B*X+C” can be calculated. As illustrated in FIG. 1, the FPGA includes a plurality of Arithmetic and Logic Units (ALUs) 101 through 105 and a plurality of lines 106. In FIG. 1, “mul P Q” means multiplying P (for example, “in (input data X)” or “01 (output data of the ALU 101)”) by R (for example, “in”, “A”, or “B”), and “add R S” means adding R (for example, “03 (output data of the ALU 103)” or “02 (output data of the ALU 102)” to S (for example, “C” or “04 (output data of the ALU 104)”). In this case, the user applies appropriate voltages to the lines 106, thus manipulating the connection state between the ALUs 101 through 105 in a wiring state illustrated by bold lines in FIG. 1, or manipulating the connection state between the ALUs 101 through 105 in a wiring state which is different from the connection state illustrated by the bold lines in FIG. 1. As such, the reconfigurable architecture includes a plurality of processing units such as the above-described ALUs 101 through 105, and the function of the reconfigurable architecture depends on the wiring state of the processing units.
In a conventional reconfigurable architecture, specifically, in a conventional reconfigurable array, when execution of a task B is requested while a task A is being executed, execution of the task A is stopped, and the task B is executed after all processing units are initialized. If execution of the task A is again requested while the task B is being executed, the execution of the task B is stopped, and execution of the task A is resumed after the all processing units are again initialized. In this way, the conventional reconfigurable array sequentially executes multitasking of a plurality of requested tasks. In the specification, the term “multitasking” means executing a plurality of tasks in parallel in such a manner that another task is executed while a task is being executed (that is, when the task is not complete). Also, the term “reconfigurable array” means a reconfigurable architecture where a plurality of processing units are arranged in a predetermined form such as a matrix. According to the multitasking method, since the conventional reconfigurable array initializes all processing units when the reconfigurable array stops a task and tries to execute a different task, the conventional reconfigurable array cannot quickly resume execution of the previous task, and accordingly, has a limitation in quick execution of multitasking.
Likewise, if the conventional reconfigurable array receives execution requests of a plurality of tasks at the same time, the conventional reconfigurable array distributes processing units constructing the reconfigurable array equally by the number of the plurality of tasks, assigns the same number of processing units to each task, and executes the task using the processing units assigned to the task. Since the multitasking method executes each task using the same number of processing units, regardless of the variety of data processing amounts which are generated when the plurality of tasks are respectively executed, the multitasking method has a limitation in quick execution of all the tasks.
Accordingly, a method of enabling a reconfigurable array to quickly complete execution of multitasking is needed.